1. Field of the Invention
The present invention relates to a fabricating method of an embedded package structure. More particularly, the present invention relates to a fabricating method of an embedded package structure with multiple layers of circuits.
2. Description of Related Art
FIGS. 1A˜1C are schematic views illustrating a conventional structure having an embedded element and a fabricating method of the conventional structure. First, as shown in FIG. 1A, an embedded element 100 is surface-mounted to two non-patterned metal layers 110 and 120. The two non-patterned metal layers 110 and 120 are laminated respectively to upper and lower sides of a dielectric layer 130, and the dielectric layer 130 is cured through performing a high-temperature baking process. Thereby, the embedded element 100 is encapsulated by the dielectric layer 130 for ensuring the embedded element 100 to operate normally without being affected by external moisture, temperature, or chemical solutions utilized in manufacturing processes. Next, as shown in FIG. 1B, a patterning process and a mechanical drilling process are carried out, such that the two non-patterned metal layers 110 and 120 are etched to form two patterned circuits 110a and 120a that are electrically connected together through a plurality of conductive through holes 130a passing through the dielectric layer 130. As such, required circuit layout is completed. Thereafter, as indicated in FIG. 1C, a process of building up circuit layers is implemented to form a plurality of pads 140 and 150 in the outermost circuit layer. These pads 140 and 150 serve as media of the embedded element 100 for electrical connection and signal transmission to external circuits.
Nonetheless, in the above-mentioned fabricating method, the embedded element 100 is fixed into the two non-patterned metal layers 110 and 120. Therefore, in a subsequently-performed etching process, inaccurate photoresist development, insufficient exposure, or excessive exposure is likely to bring about incomplete or excessive etching, thus resulting in short circuits or open circuits in the patterned circuits. As a result, the embedded element 100 can no longer be used and has to be thrown away. In addition to the above issues arising in the subsequently-performed etching process, the mechanical drilling process, the electroplating process performed on the conductive through holes, and other processes may be required in the aforesaid fabricating method, whereby yield of manufacturing circuits may be reduced. Alternatively, electrical properties of the embedded element 100 may be fatally damaged. Hence, it is imperative to ensure the embedded element 100 to function as normal while high yield of fabricating the circuits and high reliability of the entire package structure are guaranteed as well.